This invention relates to very large-scale integrated circuit (VLSI) design and, more particularly, to tools that assist in the design and creation of VLSI circuits.
Current designs of VLSIs include components that number in the millions. Obviously, when dealing with the design of such circuits it is necessary to employ automated tools in order to create, validate and improve the circuit designs and their layouts. Indeed, many tools are available in the art, and different tools cover different aspects of the VLSI circuit creation process, such as
tools that assist in creating the VLSI circuit design, PA1 tools that prepare listings of elements and their connections, in preparations for other automated processes, PA1 tools that analyze the design, PA1 tools the simulate the circuit's operation, PA1 tools that create the circuit layout, PA1 tools that identify the parasitics circuit that corresponds to the circuit's design and layout, etc.
It is important to consider the circuit's parasitic capacitances and resistances because they degrade the circuit's performance and potentially can make the circuit fall outside its intended range of operation. An example of a tool which creates a circuit consisting of the parasitic elements of a given circuit (the "parasitics circuit") is called "Clover," which is marketed by the Design Automation Organization of Bell Labs, which is part of Lucent Technologies. Given a circuit design, "Clover" creates the parasitics circuit, expresses it in an established, standardized format, e.g., the "DSPF format , (where DSPF stands for Detailed Standards Parasitic Format), and makes it available for further analysis. Various prior art tools are available that analyze parasitics circuits, such as "SPICE," which currently is a public domain program.
The problem with current tools for analyzing parasitics circuits is that they are too slow; primarily because they perform all of the necessary calculations, and the number of the required calculations is staggering. The challenge is to quickly evaluate the step response of an analyzed parasitics circuit in order to expedite the overall design process.